OIF's 2020 Transport SDN API Interoperability Demo
OIF completed a multi-vendor 2020 Transport SDN Application Programming Interface (API) interoperability demonstration aimed at validating the benefits of transport SDN for the 5G era.
The ten-week long interoperability testing exercise, which was held in Telefonica’s Madrid lab, focused on SDN-based programmability, control and automation — testing Layer 1 and Layer 0 OTN control using ONF T-API 2.1.3, with additional testing of OpenConfig device APIs for transport equipment in network-operator-defined use cases.
Participating vendors included ADVA, Ciena, Cisco Systems, Infinera and Nokia. Network operator Telefonica hosted the demo. China Telecom, Telia and TELUS participated as consulting network operators.
“Operators have demanded more open optical networks to enable flexibility, lower costs, and best-of-breed options,” said Scott Wilkinson, Lead Analyst at Cignal AI. “Standard management interfaces and multi-vendor interoperability are critical to open optical networks. The interoperability demonstration recently performed under the guidance of the OIF is a major step towards achieving those operator goals.”
“The successful completion of the OIF 2020 Transport SDN API interoperability demonstration is a significant milestone toward widespread SDN deployment in production networks,” said Arturo Mayoral, Telefónica Transport Global CTIO Unit – Technology Expert and Lead of Optical SDN strategy. “By aligning vendors for a shared purpose – interoperability – and testing multiple use cases, we’re fostering manageability and flexibility in the network to allow deployment of cloud-based services, meet dynamic bandwidth demands and accelerate transport network transformation for the 5G era.”
The results of the multi-vendor demonstration will be revealed during a public read-out webinar event being held in partnership with Lightwave, Tuesday 12 January 2021, 6:00-7:30am PST. Register for free here
A private read-out event for demo participants and invited Network Operators is scheduled for Tuesday 19 January 2021.
OIF representatives will give presentations on the current status of the 2020 OIF Transport SDN API Interoperability Demonstration during the below events:
- NGON & DCI World Digital Symposium – Friday 04 December 2020 – 20:00-20:15pm CET, OIF Speaker: Arturo Mayoral López de Lerma, Telefonica S.A
- ECOC – Monday 07 December 2020 – 17:20-17:40pm CET, OIF Speaker: Arturo Mayoral López de Lerma, Telefonica S.A
2020 Transport SDN Application Programming Interface (API) Interoperability Demonstration PR Boilerplate:
Inphi debuts its next-gen 400G DR4 silicon photonics platform
Inphi has begun sampling its next-generation 400G DR4 silicon photonics platform solution, which includes a silicon photonics integrated circuit (PIC), a flip chip transimpedance amplifier (TIA), and an analog controller.
The new 400G DR silicon photonics platform is designed to work seamlessly with Inphi’s Porrima PAM4 Digital Signal Processor (DSP).
400G DR silicon photonics platform highlights:
- Analog controller IC which replaces multiple discrete components for laser bias, configuration and monitoring of silicon photonics, and TIA control
- Inphi’s complete silicon photonics transceiver with four low-loss, transmit Mach-Zehnder modulators and four high-responsivity, receive photodiodes
- Low-power, flip chip TIA with excellent sensitivity, overload, and error floor
- Inphi’s Porrima Gen3 low-power, PAM4 DSP with integrated 56Gbaud laser driver
Inphi said it is bringing its high volume silicon wafer scale manufacturing by offering the option to purchase Inphi-designed high-performance 400G DR4 PICs in full 200-mm wafer form. Customers receive silicon PIC wafers direct from an Inphi fab partner and will be able to continue with high-volume wafer scale manufacturing and 3-D heterogenous integration in their own factories.
“Inphi has been the leading force to define and create a PAM4 ecosystem of optical modules for cloud and data center networks,” said Dr. Loi Nguyen, Founder and SVP, Optical Interconnect at Inphi. “I believe today’s announcement will mark the beginning of a new era of the ‘fabless optics’ industry. Optical transceiver manufacturers can leverage silicon high volume wafer scale in the manufacturing of transceivers without owning a fab.”
Ayar Labs hits key milestone for chip-to-chip optical connectivity
Ayar Labs demonstrated its patented monolithic electronic/photonic solution on Globalfoundries' next-gen photonics solution based on its 45nm platform.
The companies said this industry-first demonstration is a key milestone in providing chip-to-chip optical connectivity at scale. The two companies began working together in 2015 with a commitment to collaborate and commercialize differentiated silicon photonics solutions for greenfield applications that would require extreme bandwidth density (high data throughput in a small physical package) at low latency and high energy efficiency.
“Ayar Labs has been perfecting our micro-ring based monolithic electronic/photonic solution for nearly a decade. But the true commercial potential is realized when coupled with a 300mm semiconductor fabrication process that delivers the performance, reliability, and cost advantages that we and our customers require,” says Charles Wuischpard, CEO, Ayar Labs. “This is yet another industry-first result that solidifies our leadership for this market opportunity.”
“Ayar Labs is an important partner of GLOBALFOUNDRIES,” says Anthony Yu, Vice President of Silicon Photonics at GF. “As collaborators, we’ve incorporated their requirements for PDK and process optimizations while providing early access to our next-generation process. Together, we will unlock a larger market opportunity and realize chip-to-chip optical I/O solutions that will enable higher bandwidth and faster connection for high performance compute applications.”
Over the last 18 months, Ayar Labs has been working with select semiconductor manufacturers, systems builders, and end users on co-design partnerships. The company is now announcing an expanded sampling program of its next-generation chiplet developed on GF’s latest silicon photonics manufacturing process that will be available to a broader group by request at ayarlabs.com/starterkit/
Dr. Mark Wade, President and CTO of Ayar Labs, will be sharing details of this industry first demonstration at ECOC 2020 as part of his presentation on ‘Silicon photonic chiplets for chip-to-chip communications’ on Tuesday, December 8, from 16:20 – 16:40 (CET). A video of the demonstration will also be made available at this time.
Lockheed Martin Ventures has made a strategic investment in Ayar Labs, a start-up that is developing monolithic in-package optical I/O (MIPO) solution for applications that require high bandwidth, low latency and power efficient short reach interconnects. Financial terms were not disclosed.
Ayar Labs publicly demonstrated its monolithic electronic photonic TeraPHY chiplet at the Supercomputing 2019 conference and is now working with select semiconductor manufacturers, OEM systems builders, and end users on sampling and co-design partnerships in 2020. The company is based in Santa Clara, California.
“We are excited to welcome Lockheed Martin Ventures as a strategic investor,” said Charles Wuischpard, CEO of Ayar Labs. “Working with key system integrators like Lockheed Martin, who really understand the value of our solution and how to design it into future complex systems, is incredibly important. In that sense, we view this relationship as more than funding alone, but as an important long-term working relationship as well.”
Ayar Labs has been selected as Intel’s optical I/O solution partner for their recently awarded DARPA PIPES (Photonics in Package for Extreme Scalability) project.
The PIPES project aims to develop integrated optical I/O solutions co-packaged with next generation FPGA/CPU/GPU and accelerators in Multi-Chip Packages (MCP) to provide extreme data rates (input/output) at ultra-low power over much longer distances than supported by current technology. In the first phase of the project, the Ayar Labs TeraPHY chiplet will be co-packaged with an Intel FPGA using the AIB (Advanced Interconnect Bus) interface and Intel’s EMIB silicon-bridge packaging. “We’re seeing an explosion of Datacenter workloads that have an insatiable demand for bandwidth and the need to connect devices at rack-scale distances,” said Vince Hu, VP of Strategy and Innovation for Intel’s FPGA products. “The best way to do that is with optical interconnect and by using an Ayar Labs chiplet(s), we can achieve very high bandwidth at low latency and low power consumption.”
“Bringing optical connectivity all the way into the CPU/SOC package has long been one of the ‘Holy Grail’ projects in High Performance and Hyperscale Computing, as it unleashes the performance of ever more powerful computing and network processors and removes a major bottleneck and set of constraints in systems architecture and design,” said Charles Wuischpard, CEO of Ayar Labs, “Moreover, the energy consumed in moving data through a system is now very significant and growing, and the best way to manage that is to move the data optically from end to end. We are pleased to be selected by Intel as the optical solution for their DARPA PIPES project and look forward to a multi-year collaboration.”
The TeraPHY chiplet is manufactured on GLOBALFOUNDRIES' 45nm platform, which enabled Ayar Labs to build a monolithic, single-die solution that integrates both electrical and optical photonic circuits and devices on a single chip.
“We have worked in close collaboration with Ayar Labs to deliver a new class of integrated electronic, photonics solutions,” said Anthony Yu, vice president of Computing and Wired Infrastructure at GF. “Going forward, we’re excited to work with the pioneers at Ayar Labs to continue disrupting the market by combining our next generation 45nm platform, targeted to future CMOS-based photonics solutions, with their differentiated technology that will push the limits of chip communication bandwidth for high-performance computing, cloud and AI applications.”
NeoPhotonics' Class 60 coherent modulators/receivers for 100+ Gbaud
NeoPhotonics announced the addition of Class 60 versions of its Coherent Driver-Modulator (CDM) and Intradyne Coherent Receiver (Micro-ICR) to its suite of High Bandwidth Coherent components, addressing the next generation of 100+ Gbaud systems to meet the ongoing growth in demand for bandwidth, especially between cloud data centers.
These new Class 60 Coherent components extend the highest speed over distance performance of NeoPhotonics' existing Class 50 products by increasing the 3 dB bandwidth from 50 GHz to 60 GHz. The Class 60 suite improves on the currently shipping Class 40 components, and allows increasing symbol rates from the current 64+ Gbaud rate to the higher 100+ Gbaud rates. These NeoPhotonics components work together to enable customers to implement single wavelength data transmission near one Terabit per second over datacenter interconnect (DCI) distances, and long-haul 400~500Gbps transmission.
Higher symbol rates increase data capacity while maintaining superior optical signal to noise ratio (OSNR) and reach performance, thereby enabling the highest speed over distance use. These new components are available in compact form factor packages suitable for use in pluggable modules and compact daughter cards. NeoPhotonics Class 60 CDM and Micro-ICR are mechanically compatible to their Class 40 counterparts, and are a natural upgrade path for achieving the higher symbol rates (100+ Gbaud) in order to support 800Gbps and above data rates per wavelength applications.
The Class 60 suite comprises:
- Class 60 CDM: NeoPhotonics Class 60, polarization multiplexed, coherent driver modulator (CDM) features a co-packaged InP modulator with four linear, high bandwidth, differential drivers, and is designed for low V-Pi, low insertion loss and a high extinction ratio. The compact package is designed to be compliant with the form factor of the OIF Implementation Agreement #OIF-HB-CDM-01.0.
- Class 60 Micro-ICR: NeoPhotonics Class 60 High Bandwidth Micro-Intradyne Coherent Receiver (Micro-ICR) is designed for 100+ Gbaud symbol rates, more than tripling the rate of standard 100G ICRs. The compact package is designed to be compliant with the OIF Implementation Agreement OIF-DPC-MRX-02.0.
These components are designed to work together with NeoPhotonics “Nano” ultra-narrow linewidth external cavity tunable laser, which cuts the size approximately in half compared to current Micro-ITLAs, while featuring industry leading linewidth and low phase noise with low electrical power consumption.
“NeoPhotonics has supported our customers by being first to volume production of our products at each new speed node. We are pleased to now offer Class 60 coherent modulators and receivers, which along with our ultra-narrow linewidth external cavity “nano” tunable laser, provide a complete suite of components enabling customers to increase the data rate per wavelength to one Terabit and beyond,” said Tim Jenks, Chairman and CEO of NeoPhotonics. “We are continuing to extend the bandwidth of our Indium Phosphide coherent integration platform to serve the highest speed over distance applications,” concluded Mr. Jenks.
Advanced Material Solutions for Co-Packaged Optics - replay
The thermal properties of optical components become key considerations as power, processing, and utilization increase with faster data rates. For future optical components, several advanced materials are being considered.
Our guests for this webinar are:
Dr. Peter Johnson, Staff Scientist at SABIC, who discusses thermoplastic optical integration in co-packaged applications. Dr. Johnson obtained his Ph.D in Chemistry at the University of Colorado, Boulder.
Dr. Jake Joo , who leads the Optoelectronics group at Dupont. His presentation covers the high-speed data challenges for co-packaged optics, and the critical materials needed for next-gen data centers, including polymer waveguides, low-loss dialectic materials, index management materials, thermal management materials, etc. Dr. Joo obtained his PhD.D. in Materials Science and Engineering from MIT.
This is the third in a series of webinars sponsored by Dupont’s Silicon Valley Tech Center and the Consortium for On-board Optics (COBO).
Viavi introduces test tool for last mile fiber deployment
Viavi Solutions introduced a new type of network test tool to speed and simplify last mile optical fiber activation and maintenance.
The versatile VIAVI Optimeter combines the functionality of a broadband or GPON/XG(S)-PON power meter with fiber certification and connector inspection in a simple, all-in-one solution for effortless FTTx certification and troubleshooting — regardless of field technicians' experience level. The Optimeter was designed to reduce truck rolls and trouble tickets by proving successful fiber install passes, or providing clear fault ownership information to stop unnecessary handoffs.
"Pressure to meet demand for new PON/FTTH service often leads to minimal testing or even no testing. As a result, technicians are not able to complete install and activation on the first visit between 20 to 50% of the time, leading to poor customer experiences and lost revenue," said Kevin Oliver, Vice President and General Manager, Converged Instruments and Virtual Test, VIAVI. "As service activation failure rates and maintenance costs continue to rise, the VIAVI Optimeter is a critical tool for premise and home techs to make sure that last mile fiber installation is done right the first time, improving deployment success rates and reducing the need for return visits."
Vodafone Business announces AWS Wavelength edge service in London
Vodafone Business is the first company in Europe to enable an AWS Wavelength service for distributed Multi-access Edge Computing (MEC).
In collaboration with AWS, Vodafone Business’ distributed MEC service will be rolled out from the spring of 2021, starting with the first commercial centre in London, and with other locations in the UK and Germany to follow.
The commercial MEC centre in London will provide an ultra-low latency zone over a wide area and make use of Vodafone’s 5G network in the capital. In addition to areas within and around London, the low latency zone will extend to Cambridge, Oxford, Birmingham, Bristol, and Cardiff, as well as many towns home to tech firms along the M4 motorway corridor and parts of Wales and Cornwall.
Vodafone Chief Technology Officer, Johan Wibergh, said: “Every millisecond matters in digitalising manufacturing, safeguarding citizens and workers, transporting medical supplies by drone or eliminating motion sickness when wearing a VR headset. Putting these services much closer to the customer with Vodafone’s Edge Computing service will significantly reduce any delay in transmitting critical services. By opening up new innovation hubs within our 5G network, which currently spans 127 cities and nine markets in Europe, we can help turn new business ideas into commercial successes.”